Performance assessment of the charge-plasma-based cylindrical GAA vertical nanowire TFET with impact of interface trap charges

N Kumar, A Raman - IEEE Transactions on Electron Devices, 2019 - ieeexplore.ieee.org
In this article, a charge-plasma (CP)-based gate-all-around (GAA) silicon vertical nanowire
tunnel field-effect transistor (NWTFET) is proposed. The effects of interface trap charges …

FinFET to GAA MBCFET: A Review and Insights

RR Das, TR Rajalekshmi, A James - IEEE Access, 2024 - ieeexplore.ieee.org
This review article presents a journey from Fin-shaped field effect transistor (FinFET) to gate-
all-around multi-bridge channel field effect transistor (GAA MBCFET) technology, unraveling …

GaAs0. 5Sb0. 5/In0. 53Ga0. 47As heterojunction do**less charge plasma-based tunnel FET for analog/digital performance improvement

A Bhattacharyya, M Chanda, D De - Superlattices and Microstructures, 2020 - Elsevier
A dual side do**-less (DL) GaAs 0.5 Sb 0· 5/In 0. 53 Ga 0. 47 As heterojunction tunnel
FET (DDL-HTFET) configuration together with hetero-gate-dielectric material (HfO 2/SiO 2) …

Design of tunnel FET architectures for low power application using improved Chimp optimizer algorithm

S Bhattacharya, SL Tripathi, VK Kamboj - Engineering with Computers, 2023 - Springer
An improved Chimps optimizer algorithm is proposed in this paper and is applied for the
performance optimization of tunnel FET architectures for use in low power VLSI circuits. The …

Investigation of interface trap charges and temperature variation in heterostacked-TFET

K Vanlalawmpuia, B Bhowmick - Indian Journal of Physics, 2021 - Springer
This paper analyzes the reliability issues of the Heterostacked-TFET (HS-TFET) in detail.
The investigation of the device reliability is carried out by examining the effect of interface …

Modeling and simulation of optically gated TFET for near infra-red sensing applications and its low frequency noise analysis

VD Wangkheirakpam, B Bhowmick… - IEEE Sensors …, 2020 - ieeexplore.ieee.org
In this paper, optically gated Tunnel Field Effect Transistor (TFET), operating on the principle
of band-to-band tunneling, is designed for sensing closely spaced spectral wavelengths …

Design Transmission Gates Using Double-Gate Junctionless TFETs

S Bhattacharya, SL Tripathi, GH Nayana - Silicon, 2024 - Springer
Transmission gate has been implemented using tunnel field-effect-transistor (TFET) in the
presented work. This work demonstrates the benefits of replacing MOS devices with TFET …

Research on total ionizing dose effect and reinforcement of SOI-TFET

C Chong, H Liu, S Wang, X Wu - micromachines, 2021 - mdpi.com
Since the oxide/source overlap structure can improve the tunneling probability and on-state
current of tunneling field effect transistor (TFET) devices, and the silicon-on-insulator (SOI) …

Design and investigation of a dual material gate arsenic alloy heterostructure junctionless TFET with a lightly doped Source

H **e, H Liu, S Chen, T Han, S Wang - Applied Sciences, 2019 - mdpi.com
This paper designs and investigates a novel structure of dual material gate-engineered
heterostructure junctionless tunnel field-effect transistor (DMGE-HJLTFET) with a lightly …

Interfacial charge and temperature analysis of gate-all-around line tunneling TFET for improved device reliability

KRN Karthik, CK Pandey - Physica Scripta, 2024 - iopscience.iop.org
In this article, the impact of interface-trap charges (ITCs) on the DC and analog/RF
parameters of gate-all-around vertical TFET (GAA-VTFET) are considered to evaluate the …