Programmable resistive device and memory using diode as selector
SC Chung - US Patent 9,818,478, 2017 - Google Patents
Building programmable resistive devices in contact holes at the crossover of a plurality of
conductor lines in more than two vertical layers is disclosed. There are plurality of first …
conductor lines in more than two vertical layers is disclosed. There are plurality of first …
Materials for magnetoresistive random access memory
JM Slaughter - Annual Review of Materials Research, 2009 - annualreviews.org
MRAM technology is based on the storage of data in stable magnetic states using devices
that have a large magnetoresistance effect, so that the data can be read by determining the …
that have a large magnetoresistance effect, so that the data can be read by determining the …
After hard drives—What comes next?
MH Kryder, CS Kim - IEEE Transactions on Magnetics, 2009 - ieeexplore.ieee.org
There are numerous emerging nonvolatile memory technologies, which have been
proposed as being capable of replacing hard disk drives (HDDs). In this paper, the …
proposed as being capable of replacing hard disk drives (HDDs). In this paper, the …
Spin-transfer torque memories: Devices, circuits, and systems
Spin-transfer torque magnetic memory (STT-MRAM) has gained significant research interest
due to its nonvolatility and zero standby leakage, near unlimited endurance, excellent …
due to its nonvolatility and zero standby leakage, near unlimited endurance, excellent …
Low store energy, low VDDmin, 8T2R nonvolatile latch and SRAM with vertical-stacked resistive memory (memristor) devices for low power mobile applications
PF Chiu, MF Chang, CW Wu… - IEEE Journal of Solid …, 2012 - ieeexplore.ieee.org
Many mobile SoC chips employ a “two-macro” approach including volatile and nonvolatile
memory macros (ie SRAM and Flash), to achieve high-performance or low-voltage power-on …
memory macros (ie SRAM and Flash), to achieve high-performance or low-voltage power-on …
Design and optimization of nonvolatile multibit 1T1R resistive RAM
Memristor-based random access memory (RAM) is being explored as a potential
replacement for flash memory to sustain the historic trends in the improvement of density …
replacement for flash memory to sustain the historic trends in the improvement of density …
A 1Mb 28nm STT-MRAM with 2.8 ns read access time at 1.2 V VDD using single-cap offset-cancelled sense amplifier and in-situ self-write-termination
1T1R spin-transfer-torque (STT) MRAM is a promising candidate for next-generation high-
density embedded non-volatile memory [1-2]. However, 1T1R STT-MRAM suffers from …
density embedded non-volatile memory [1-2]. However, 1T1R STT-MRAM suffers from …
Circuit and system of using FinFET for building programmable resistive devices
SC Chung - US Patent 8,848,423, 2014 - Google Patents
FET technologies can be used as program selectors or One Time Programmable (OTP)
element in a programmable resis tive device. Such as interconnect fuse, contact/via fuse …
element in a programmable resis tive device. Such as interconnect fuse, contact/via fuse …
Cross-layer racetrack memory design for ultra high density and low power consumption
The racetrack memory technology utilizes magnetic domains along a nanoscopic wire to
obtain ultra-high data storage density. The recent success in the planar racetrack nanowire …
obtain ultra-high data storage density. The recent success in the planar racetrack nanowire …
A 1-Mb 28-nm 1T1MTJ STT-MRAM With Single-Cap Offset-Cancelled Sense Amplifier and In Situ Self-Write-Termination
1T1MTJ spin-transfer-torque (STT)-MRAM is a promising candidate for next-generation high-
density embedded non-volatile memory. This paper presents a 1-Mb 28-nm 1T1MTJ STT …
density embedded non-volatile memory. This paper presents a 1-Mb 28-nm 1T1MTJ STT …