A survey of coarse-grained reconfigurable architecture and design: Taxonomy, challenges, and applications

L Liu, J Zhu, Z Li, Y Lu, Y Deng, J Han, S Yin… - ACM Computing …, 2019 - dl.acm.org
As general-purpose processors have hit the power wall and chip fabrication cost escalates
alarmingly, coarse-grained reconfigurable architectures (CGRAs) are attracting increasing …

Architecture, challenges and applications of dynamic reconfigurable computing

Y Lu, L Liu, J Zhu, S Yin, S Wei - Journal of Semiconductors, 2020 - iopscience.iop.org
As a computing paradigm that combines temporal and spatial computations, dynamic
reconfigurable computing provides superiorities of flexibility, energy efficiency and area …

Tomahawk: Parallelism and heterogeneity in communications signal processing MPSoCs

O Arnold, E Matus, B Noethen, M Winter… - ACM Transactions on …, 2014 - dl.acm.org
Heterogeneity and parallelism in MPSoCs for 4G (and beyond) communications signal
processing are inevitable in order to meet stringent power constraints and performance …

On-chip memory hierarchy in one coarse-grained reconfigurable architecture to compress memory space and to reduce reconfiguration time and data-reference time

Y Wang, L Liu, S Yin, M Zhu, P Cao… - IEEE Transactions on …, 2013 - ieeexplore.ieee.org
The coarse-grained reconfigurable architecture (CGRA) is proven to be energy efficient in
several specific domains. In CGRAs, the on-chip memory hierarchy, which contains the …

A fast and accurate technique for map** parallel applications on stream-oriented MPSoC platforms with communication awareness

M Ruggiero, A Guerri, D Bertozzi, M Milano… - International Journal of …, 2008 - Springer
The problem of allocating and scheduling precedence-constrained tasks on the processors
of a distributed real-time system is NP-hard. As such, it has been traditionally tackled by …

Still image processing on coarse-grained reconfigurable array architectures

M Hartmann, V Pantazis, T Vander Aa… - Journal of Signal …, 2010 - Springer
Due to the increasing demands on efficiency, performance and flexibility reconfigurable
computational architectures are very promising candidates in embedded systems design …

Design of a coarse-grained reconfigurable architecture with floating-point support and comparative study

M Jo, D Lee, K Han, K Choi - Integration, 2014 - Elsevier
With a huge increase in demand for various kinds of compute-intensive applications in
electronic systems, researchers have focused on coarse-grained reconfigurable …

Floating-point operation based reconfigurable architecture for radar processing

F Feng, L Li, K Wang, F Han, B Zhang… - IEICE Electronics …, 2016 - jstage.jst.go.jp
To meet the increasing demand of large bandwidth and high throughput in modern radar
system, we proposed a reconfigurable application specified processor (RASP) according to …

Coarse Grained ADRES Based MIMO-OFDM Transceiver with New Radix- Pipeline FFT/IFFT Processor

N Janakiraman, P Nirmalkumar, SM Akram - Circuits, Systems, and Signal …, 2015 - Springer
Software defined radio (SDR) is an adaptive radio that sense and adjust the operating
parameters based on the environment. MIMO-OFDM technique based SDR transceiver is an …

Energy-performance exploration of a CGA-based SDR processor

D Novo, T Schuster, B Bougard, A Lambrechts… - Journal of Signal …, 2009 - Springer
Abstract Software-Defined Radio (SDR) provides the flexibility to enable cost-effective multi-
mode terminals. However, the growing complexity of the new communication standards …