[PDF][PDF] A review on semiconductors including applications and temperature effects in semiconductors

MA Rahman - … Research Journal for Engineering, Technology, and …, 2014 - huggingface.co
There is no doubt that semiconductors changed the world beyond anything that could have
been imagined before them. Although people have probably always needed to …

[LIBRO][B] Managing temperature effects in nanoscale adaptive systems

D Wolpert, P Ampadu - 2011 - books.google.com
This book discusses new techniques for detecting, controlling, and exploiting the impacts of
temperature variations on nanoscale circuits and systems. A new sensor system is …

An energy-efficient nonvolatile in-memory computing architecture for extreme learning machine by domain-wall nanowire devices

Y Wang, H Yu, L Ni, GB Huang, M Yan… - IEEE Transactions …, 2015 - ieeexplore.ieee.org
The data-oriented applications have introduced increased demands on memory capacity
and bandwidth, which raises the need to rethink the architecture of the current computing …

Integrated silicon microfluidic cooling of a high-power overclocked CPU for efficient thermal management

SK Rajan, B Ramakrishnan, H Alissa, W Kim… - IEEE …, 2022 - ieeexplore.ieee.org
The stagnation of Dennard scaling along with the move towards heterogeneous 2.5 D and
3D ICs is increasing the thermal design power (TDP) envelopes of general-purpose CPUs …

[PDF][PDF] Leakage current in sub-micrometer cmos gates

PF Butzen, RP Ribas - Universidade Federal do Rio Grande do …, 2006 - researchgate.net
Static power consumption is nowadays a crucial design parameter in digital circuits due to
emergent mobile products. Leakage currents, the main responsible for static power …

A 4-transistor nMOS-only logic-compatible gain-cell embedded DRAM with over 1.6-ms retention time at 700 mV in 28-nm FD-SOI

R Giterman, A Fish, A Burg… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
Gain-cell embedded DRAM (GC-eDRAM) is a possible alternative to traditional static
random access memories (SRAM). While GC-eDRAM provides high-density, low-leakage …

Design and analysis of a 32 nm PVT tolerant CMOS SRAM cell for low leakage and high stability

S Lin, YB Kim, F Lombardi - Integration, 2010 - Elsevier
A novel nine transistor (9T) CMOS SRAM cell design at 32nm feature size is presented to
improve the stability, power dissipation, and delay of the conventional SRAM cell along with …

Temperature effects in semiconductors

D Wolpert, P Ampadu, D Wolpert, P Ampadu - … temperature effects in …, 2012 - Springer
The changes in temperature described in the previous chapter affect the speed, power, and
reliability of our systems. Throughout this book, we will examine all three of these metrics …

[LIBRO][B] Introduction to VLSI systems: a logic, circuit, and system perspective

MB Lin - 2011 - taylorfrancis.com
With the advance of semiconductors and ubiquitous computing, the use of system-on-a-chip
(SoC) has become an essential technique to reduce product cost. With this progress and …

Impact of technology scaling on leakage power in nano-scale bulk CMOS digital standard cells

Z Abbas, M Olivieri - Microelectronics Journal, 2014 - Elsevier
Leakage estimation is an important step in nano-scale technology digital design flows. While
reliable data exist on leakage trends with bulk CMOS technology scaling in stand-alone …