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Memristive technologies for data storage, computation, encryption, and radio-frequency communication
Memristive devices, which combine a resistor with memory functions such that voltage
pulses can change their resistance (and hence their memory state) in a nonvolatile manner …
pulses can change their resistance (and hence their memory state) in a nonvolatile manner …
Compute-in-memory chips for deep learning: Recent trends and prospects
Compute-in-memory (CIM) is a new computing paradigm that addresses the memory-wall
problem in hardware accelerator design for deep learning. The input vector and weight …
problem in hardware accelerator design for deep learning. The input vector and weight …
Challenges and trends of SRAM-based computing-in-memory for AI edge devices
CJ Jhang, CX Xue, JM Hung… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
When applied to artificial intelligence edge devices, the conventionally von Neumann
computing architecture imposes numerous challenges (eg, improving the energy efficiency) …
computing architecture imposes numerous challenges (eg, improving the energy efficiency) …
A computing-in-memory macro based on three-dimensional resistive random-access memory
Q Huo, Y Yang, Y Wang, D Lei, X Fu, Q Ren, X Xu… - Nature …, 2022 - nature.com
Non-volatile computing-in-memory macros that are based on two-dimensional arrays of
memristors are of use in the development of artificial intelligence edge devices. Scaling such …
memristors are of use in the development of artificial intelligence edge devices. Scaling such …
Research progress on memristor: From synapses to computing systems
As the limits of transistor technology are approached, feature size in integrated circuit
transistors has been reduced very near to the minimum physically-realizable channel length …
transistors has been reduced very near to the minimum physically-realizable channel length …
Memristor-based hardware accelerators for artificial intelligence
Satisfying the rapid evolution of artificial intelligence (AI) algorithms requires exponential
growth in computing resources, which, in turn, presents huge challenges for deploying AI …
growth in computing resources, which, in turn, presents huge challenges for deploying AI …
A CMOS-integrated spintronic compute-in-memory macro for secure AI edge devices
YC Chiu, WS Khwa, CS Yang, SH Teng, HY Huang… - Nature …, 2023 - nature.com
Artificial intelligence edge devices should offer high inference accuracy and rapid response
times, as well as being energy efficient. Ensuring the security of these devices against …
times, as well as being energy efficient. Ensuring the security of these devices against …
HERMES-Core—A 1.59-TOPS/mm2 PCM on 14-nm CMOS In-Memory Compute Core Using 300-ps/LSB Linearized CCO-Based ADCs
We present a 256 256 in-memory compute (IMC) core designed and fabricated in 14-nm
CMOS technology with backend-integrated multi-level phase change memory (PCM). It …
CMOS technology with backend-integrated multi-level phase change memory (PCM). It …
16.1 A 22nm 4Mb 8b-precision ReRAM computing-in-memory macro with 11.91 to 195.7 TOPS/W for tiny AI edge devices
CX Xue, JM Hung, HY Kao, YH Huang… - … Solid-State Circuits …, 2021 - ieeexplore.ieee.org
Battery-powered tiny-AI edge devices require large-capacity nonvolatile compute-in-memory
(nvCIM), with multibit input (IN), weight (W), and output (OUT) precision to support complex …
(nvCIM), with multibit input (IN), weight (W), and output (OUT) precision to support complex …
4K-memristor analog-grade passive crossbar circuit
The superior density of passive analog-grade memristive crossbar circuits enables storing
large neural network models directly on specialized neuromorphic chips to avoid costly off …
large neural network models directly on specialized neuromorphic chips to avoid costly off …