This article presents a biased implementation style weak-indication self-timed full adder
design that is latency optimized. The proposed full adder is constructed using the delay …

N-modular redundancy (NMR) is commonly used to enhance the fault tolerance of a
circuit/system, when subject to a fault-inducing environment such as in space or military …

This article presents two area/latency optimized gate level asynchronous full adder designs
which correspond to early output logic. The proposed full adders are constructed using the …

This article makes a comparative evaluation of quasi-delay-insensitive (QDI) asynchronous
adders, realized using the delay-insensitive dual-rail code, which adhere to 4-phase return …

This paper presents real-time image processing applications using multicore and
multiprocessing technologies. To this end, parallel image segmentation was performed on …

Solving block-tridiagonal systems is one of the key issues in numerical simulations of many
scientific and engineering problems. Non-zero elements are mainly concentrated in the …

This paper described the nascent filed of big health data classification and disease
probability prediction based on multi-GPU cluster MapReduce platform. Firstly, we …

Adder is an important datapath unit of a general-purpose microprocessor or a digital signal
processor. In the nanoelectronics era, the design of an adder that is modular and which can …

Network cost and fixed-degree characteristic for the graph are important factors to evaluate
interconnection networks. In this paper, we propose hierarchical Petersen network (HPN) …

Nowadays, synchronous digital circuits design in MOS technology can cause difficulties, this
is due to the clock signal. The asynchronous paradigm presents interesting features focused …