Well-designed circuits are one key ldquoinsulatingrdquo layer between the increasingly
unruly behavior of scaled complementary metal-oxide-semiconductor devices and the …

This paper reviews the status of present day on-chip wiring design methodologies and
understanding. A brief explanation is given of the fundamental transmission-line properties …

Understanding the supply fluctuations of various frequency harmonics is essential to
maximizing microprocessor performance. Conventional methods used for analog validation …

This paper presents a technique for characterizing the statistical properties and spectrum of
power supply noise using only two on-chip low-throughput samplers. The samplers utilize a …

We present circuits for driving long on-chip wires through a series capacitor. The capacitor
improves delay through signal pre-emphasis, offers a reduced voltage swing on the wire for …

We describe transmitter and receiver circuits for a 10-Gbps single-ended optical link in a 40-
nm CMOS technology. The circuits are bonded using low-parasitic micro-solder bumps to …

This paper describes a half-swing pulse-mode gate family that uses reduced input signal
swing without sacrificing performance. These gates are well suited for decreasing the power …

Today's high-speed interfaces are limited by the bandwidth of the communication channel,
tight power constraints and noise sources that differ from those in standard communication …

We present circuits for a high-efficiency low-swing interconnect scheme suitable for the
Smart Memories reconfigurable architecture. By using a separate supply, global clocking …

This paper describes voltage and timing margins and design trade-offs in low-cost parallel
links. Results from a transceiver prototype demonstrate that per-pin skew compensation …