Virtualization of hardware accelerator allowing simultaneous reading and writing

M Bolic, J Parri, W Wang - US Patent 10,037,222, 2018 - Google Patents
Technologies are generally provided to virtualize hardware acceleration. In some examples,
a coprovisor component may be configured to multiplex multiple domains' requests to …

pvFPGA: Accessing an FPGA-based hardware accelerator in a paravirtualized environment

W Wang, M Bolic, J Parri - 2013 International Conference on …, 2013 - ieeexplore.ieee.org
In this paper we present pvFPGA, the first system design solution for virtualizing an FPGA-
based hardware accelerator on the x86 platform. Our design adopts the Xen virtual machine …

R3TOS: a novel reliable reconfigurable real-time operating system for highly adaptive, efficient, and dependable computing on FPGAs

X Iturbe, K Benkrid, C Hong, A Ebrahim… - IEEE Transactions …, 2013 - ieeexplore.ieee.org
Despite the clear potential of FPGAs to push the current power wall beyond what is possible
with general-purpose processors, as well as to meet ever more exigent reliability …

Microkernel architecture and hardware abstraction layer of a reliable reconfigurable real-time operating system (R3TOS)

X Iturbe, K Benkrid, C Hong, A Ebrahim… - ACM Transactions on …, 2015 - dl.acm.org
This article presents a new solution for easing the development of reconfigurable
applications using Field-Programable Gate Arrays (FPGAs). Namely, our Reliable …

Virtualized on-chip distributed computing for heterogeneous reconfigurable multi-core systems

S Werner, O Oey, D Göhringer… - … Design, Automation & …, 2012 - ieeexplore.ieee.org
Efficiently managing the parallel execution of various application tasks onto a
heterogeneous multi-core system consisting of a combination of processors and …

pvFPGA: paravirtualising an FPGA-based hardware accelerator towards general purpose computing

W Wang, M Bolic, J Parri - International Journal of High …, 2017 - inderscienceonline.com
This paper presents an ameliorated design of pvFPGA, which is a novel system design
solution for virtualising an FPGA-based hardware accelerator by a virtual machine monitor …

[HTML][HTML] Biomarkers of fibrosis and inflammation and the risk of arrhythmia recurrence after elective electrical cardioversion in patients with atrial fibrillation and …

EI Barashkova, VA Ionin… - Russian Journal of …, 2024 - russjcardiol.elpub.ru
Aim. To evaluate the effect of blood concentrations of biomarkers of inflammation and
fibrosis, obesity parameters, and parameters characterizing cardiac remodeling on the risk …

[HTML][HTML] Биомаркеры фиброза и воспаления и риск рецидива аритмии после плановой электрической кардиоверсии у пациентов с фибрилляцией …

ЕИ Барашкова, ВА Ионин… - Российский …, 2024 - cyberleninka.ru
Цель. Оценить влияние концентраций в крови биомаркеров воспаления и фиброза,
параметров ожирения и показателей, характеризующих ремоделирование сердца, на …

[PDF][PDF] Accessing an FPGA-based hardware accelerator in a paravirtualized environment

W Wang - 2013 - ruor.uottawa.ca
In this thesis we present pvFPGA, the first system design solution for virtualizing an FPGA-
based hardware accelerator on the x86 platform. The accelerator design on the FPGA can …

[หนังสือ][B] Adaptable OS Services for Distributed Reconfigurable Systems on Chip

S Samara - 2010 - digital.ub.uni-paderborn.de
The ever guest for more computational capabilities leads to embedded systems which
consist of multiple computational elements integrated on a single chip. An example is the …