Develo** Field-programmable Gate Array (FPGA) architectures is challenging due to the
competing requirements of various application domains and changing manufacturing …

Exploring architectures for large, modern FPGAs requires sophisticated software that can
model and target hypothetical devices. Furthermore, research into new CAD algorithms …

Reconfigurable architectures can bring unique capabilities to computational tasks. They
offer the performance and energy efficiency of hardware with the flexibility of software. In …

In this work, we present Odin II, a framework for Verilog Hardware Description Language
(HDL) synthesis that allows researchers to investigate approaches/improvements to different …

Co-segmentation is defined as jointly partitioning multiple images depicting the same or
similar object, into foreground and background. Our method consists of a multiple-scale …

Design flows are the explicit combinations of design transformations, primarily involved in
synthesis, placement, and routing processes, to accomplish the design of integrated circuits …

Routing is a crucial step in Field Programmable Gate Array (FPGA) physical design, as it
determines the routes of signals in the circuit, which impacts the design implementation …

Ensuring proper privacy and protection of the information stored, communicated, processed,
and disseminated in the cloud as well as of the users accessing such an information is one …

This book presents a new FPGA architecture known as tree-based FPGA architecture, due to
its hierarchical nature. This type of architecture has been relatively unexplored despite their …

Coarse grain reconfigurable architectures (CGRAs) are an emerging hybrid computational
architecture that has the parallel customization benefits of low-level logic devices, such as …