This article elaborates on the state-of-the-art novel Udayan S. Patankar (USP)-Awadhoot
algorithm for distinctive implementation area improvement for area-critical electronic …

A new implementation for decimal floating-point (DFP) division is introduced. The algorithm
is based on high-radix SRT division< footnoteref refid=" fn1" role=" fn"/>< footnote id=" fn1" …

Hybrid floating-point (FP) implementations improve software FP performance without
incurring the area overhead of full hardware FP units. The proposed implementations are …

Robust and secure ranging is among the most vital capabilities demanded by future
autonomous vehicles and robotics for precise navigation and avoiding collisions. Light …

The authors study previous major contributions to digit recurrence decimal division
hardware and focus on techniques for improving the performance of quotient digit selection …

The widths of data words in digital processors have a direct impact on area in application-
specific ICs (ASICs) and FPGAs. Circuit area impacts energy dissipation per workload and …

A new implementation for minimally redundant radix-4 floating-point SRT div/sqrt
(division/square-root) with the recurrence in the signed-digit format is introduced. The …

A decimal Goldschmidt (DG) division architecture is presented, where the underlying
algorithm is described by an optimized RTL (Register Transfer Language) code that allows …

Despite floating-point (FP) being the most commonly used method for real number
representation, certain architectures are still limited to fixed-point arithmetic due to the large …

A new implementation for minimally redundant radix-4 SRT division with the recurrence in
the signed-digit format is introduced. The implementation is developed based on the …