Intelligent computing: the latest advances, challenges, and future

S Zhu, T Yu, T Xu, H Chen, S Dustdar, S Gigan… - Intelligent …, 2023‏ - spj.science.org
Computing is a critical driving force in the development of human civilization. In recent years,
we have witnessed the emergence of intelligent computing, a new computing paradigm that …

Challenges and trends of SRAM-based computing-in-memory for AI edge devices

CJ Jhang, CX Xue, JM Hung… - IEEE Transactions on …, 2021‏ - ieeexplore.ieee.org
When applied to artificial intelligence edge devices, the conventionally von Neumann
computing architecture imposes numerous challenges (eg, improving the energy efficiency) …

C3SRAM: An in-memory-computing SRAM macro based on robust capacitive coupling computing mechanism

Z Jiang, S Yin, JS Seo, M Seok - IEEE Journal of Solid-State …, 2020‏ - ieeexplore.ieee.org
This article presents C3SRAM, an in-memory-computing SRAM macro. The macro is an
SRAM module with the circuits embedded in bitcells and peripherals to perform hardware …

A 64-tile 2.4-Mb in-memory-computing CNN accelerator employing charge-domain compute

H Valavi, PJ Ramadge, E Nestler… - IEEE Journal of Solid …, 2019‏ - ieeexplore.ieee.org
Large-scale matrix-vector multiplications, which dominate in deep neural networks (DNNs),
are limited by data movement in modern VLSI technologies. This paper addresses data …

X-SRAM: Enabling in-memory Boolean computations in CMOS static random access memories

A Agrawal, A Jaiswal, C Lee… - IEEE Transactions on …, 2018‏ - ieeexplore.ieee.org
Silicon-based static random access memories (SRAM) and digital Boolean logic have been
the workhorse of the state-of-the-art computing platforms. Despite tremendous strides in …

A twin-8T SRAM computation-in-memory unit-macro for multibit CNN-based AI edge processors

X Si, JJ Chen, YN Tu, WH Huang… - IEEE Journal of Solid …, 2019‏ - ieeexplore.ieee.org
Computation-in-memory (CIM) is a promising candidate to improve the energy efficiency of
multiply-and-accumulate (MAC) operations of artificial intelligence (AI) chips. This work …

A CMOS-integrated compute-in-memory macro based on resistive random-access memory for AI edge devices

CX Xue, YC Chiu, TW Liu, TY Huang, JS Liu… - Nature …, 2021‏ - nature.com
The development of small, energy-efficient artificial intelligence edge devices is limited in
conventional computing architectures by the need to transfer data between the processor …

8T SRAM cell as a multibit dot-product engine for beyond von Neumann computing

A Jaiswal, I Chakraborty, A Agrawal… - IEEE Transactions on …, 2019‏ - ieeexplore.ieee.org
Large-scale digital computing almost exclusively relies on the von Neumann architecture,
which comprises separate units for storage and computations. The energy-expensive …

A dual-split 6T SRAM-based computing-in-memory unit-macro with fully parallel product-sum operation for binarized DNN edge processors

X Si, WS Khwa, JJ Chen, JF Li, X Sun… - … on Circuits and …, 2019‏ - ieeexplore.ieee.org
Computing-in-memory (CIM) is a promising approach to reduce the latency and improve the
energy efficiency of deep neural network (DNN) artificial intelligence (AI) edge processors …

IMAC: In-memory multi-bit multiplication and accumulation in 6T SRAM array

M Ali, A Jaiswal, S Kodge, A Agrawal… - … on Circuits and …, 2020‏ - ieeexplore.ieee.org
In-memory computing'is being widely explored as a novel computing paradigm to mitigate
the well known memory bottleneck. This emerging paradigm aims at embedding some …