A unified approach to sparse signal processing

F Marvasti, A Amini, F Haddadi… - EURASIP journal on …, 2012 - Springer
A unified view of the area of sparse signal processing is presented in tutorial form by
bringing together various fields in which the property of sparsity has been successfully …

Processor design for soft errors: Challenges and state of the art

T Li, JA Ambrose, R Ragel… - ACM Computing Surveys …, 2016 - dl.acm.org
Today, soft errors are one of the major design technology challenges at and beyond the
22nm technology nodes. This article introduces the soft error problem from the perspective …

Clear: C ross-l ayer e xploration for a rchitecting r esilience-combining hardware and software techniques to tolerate soft errors in processor cores

E Cheng, S Mirkhani, LG Szafaryn, CY Cher… - Proceedings of the 53rd …, 2016 - dl.acm.org
We present a first of its kind framework which overcomes a major challenge in the design of
digital systems that are resilient to reliability failures: achieve desired resilience targets at …

Safety and reliability driven task allocation in distributed systems

S Srinivasan, NK Jha - IEEE transactions on Parallel and …, 1999 - ieeexplore.ieee.org
Distributed computer systems are increasingly being employed for critical applications, such
as aircraft control, industrial process control, and banking systems. Maximizing performance …

Algorithm-based fault tolerance for FFT networks

SJ Wang, NK Jha - IEEE Transactions on Computers, 1994 - ieeexplore.ieee.org
Algorithm-based fault tolerance (ABFT) is a low-overhead system-level fault tolerance
technique. Many ABFT schemes have been proposed in the past for fast Fourier transform …

Soft error tolerant convolutional neural networks on FPGAs with ensemble learning

Z Gao, H Zhang, Y Yao, J **ao, S Zeng… - … Transactions on Very …, 2022 - ieeexplore.ieee.org
Convolutional neural networks (CNNs) are widely used in computer vision and natural
language processing. Field-programmable gate arrays (FPGAs) are popular accelerators for …

Algorithm-based fault tolerance on a hypercube multiprocessor

P Banerjee, JT Rahmeh, C Stunkel… - IEEE Transactions …, 1990 - ieeexplore.ieee.org
The design of fault-tolerant hypercube multiprocessor architecture is discussed. The authors
propose the detection and location of faulty processors concurrently with the actual …

3D InfoVis is here to stay: Deal with it

R Brath - 2014 IEEE VIS International Workshop on 3DVis …, 2014 - ieeexplore.ieee.org
3D information visualization has existed for more than 100 years. 3D offers intrinsic
attributes such as an extra dimension for encoding position and length, meshes and …

Finite-time memory fault detection filter design for nonlinear discrete systems with deception attacks

W Chen, J Hu, Z Wu, X Yu, D Chen - International Journal of …, 2020 - Taylor & Francis
In this paper, the finite-time memory fault detection filter (MFDF) is designed for nonlinear
discrete systems with randomly occurring deception attacks, where the phenomenon of the …

Fault tolerant parallel filters based on error correction codes

Z Gao, P Reviriego, W Pan, Z Xu… - … Transactions on very …, 2014 - ieeexplore.ieee.org
Digital filters are widely used in signal processing and communication systems. In some
cases, the reliability of those systems is critical, and fault tolerant filter implementations are …