Towards converged, collaborative and co-automatic (3C) optical networks

Y Ji, J Zhang, X Wang, H Yu - Science China information sciences, 2018 - Springer
The interconnection of all things is develo** a new diagram of future information networks.
However, it is difficult to realize future applications with only one single technique …

Fault-tolerant routing mechanism in 3D optical network-on-chip based on node reuse

P Guo, W Hou, L Guo, W Sun, C Liu… - … on Parallel and …, 2019 - ieeexplore.ieee.org
The three-dimensional Network-on-Chips (3D NoCs) has become a mature multi-core
interconnection architecture in recent years. However, the traditional electrical lines have …

Low insertion loss and non-blocking microring-based optical router for 3d optical network-on-chip

P Guo, W Hou, L Guo, Q Yang, Y Ge… - IEEE Photonics …, 2018 - ieeexplore.ieee.org
With the advent of complex computing applications such as cloud computing and artificial
intelligence, the utilization of multicore processors has become one of the best solutions to …

O-Star: An optical switching architecture featuring mode and wavelength-division multiplexing for on-chip many-core systems

W Hou, P Guo, L Guo, X Zhang… - Journal of Lightwave …, 2021 - ieeexplore.ieee.org
In this paper, we propose O-Star, a scalable optical switching architecture for on-chip many-
core systems, employing hybrid mode and wavelength division multiplexing technology. The …

An Energy‐Efficient Silicon Photonic‐Assisted Deep Learning Accelerator for Big Data

M Li, Y Wang - Wireless Communications and Mobile …, 2020 - Wiley Online Library
Deep learning has become the most mainstream technology in artificial intelligence (AI)
because it can be comparable to human performance in complex tasks. However, in the era …

Design of duel-core connected mesh topology and fine-grained fault-tolerant mechanism for 3D optical network-on-chip

P Guo, X He, Y Yang, K Liu, S Yu, W Hou… - Science China Information …, 2023 - Springer
This paper proposes a fault-tolerant mechanism including a reliable three-dimensional (3D)
topology structure named 3D DCMesh (3D duel-core connected mesh) and a fault-tolerant …

Designs of 3D mesh and torus optical Network-on-Chips: Topology, optical router and routing module

L Guo, W Hou, P Guo - China Communications, 2017 - ieeexplore.ieee.org
As a nanometer-level interconnection, the Optical Network-on-Chip (ONoC) was proposed
since it was typically characterized by low latency, high bandwidth and power efficiency …

Design for architecture and router of 3D free-space optical network-on-chip

P Guo, W Hou, L Guo, X Zhang, Z Ning… - 2018 IEEE …, 2018 - ieeexplore.ieee.org
Nowadays, owing to the advantages of high bandwidth and low power consumption, the
wired optical network-on-chip (W-ONoC) has emerged as a high-performance on-chip …

3D mesh ONoC: design of low insertion loss and non-blocking optical router and efficient routing algorithm

S Asadinia, E Yaghoubi… - 2023 14th International …, 2023 - ieeexplore.ieee.org
In recent years, the 3D Network on Chips (3DNoCs) is an optimal solution to use multi-core
processors and overcome the bandwidth limit of electrical connections. The use of optical …

Loss-aware routing algorithm for photonic networks on chip

S Vahidifar, M Reshadi - The Journal of Supercomputing, 2017 - Springer
Photonic network on chip was introduced as an efficient communication platform to
overcome the existing challenges in traditional networks on chip. Optical networks provide …