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FPGA based countermeasures against side channel attacks on block ciphers
D Jayasinghe, B Udugama… - … of the 28th Asia and South …, 2023 - dl.acm.org
Field Programmable Gate Arrays (FPGAs) are increasingly ubiquitous. FPGAs enable
hardware acceleration and reconfigurability. Any security breach or attack on critical …
hardware acceleration and reconfigurability. Any security breach or attack on critical …
ASCENT: Amplifying Power Side-Channel Resilience via Learning & Monte-Carlo Tree Search
Power side-channel (PSC) analysis is pivotal for securing cryptographic hardware. Prior art
focused on securing gate-level netlists obtained as-is from chip design automation …
focused on securing gate-level netlists obtained as-is from chip design automation …
Uclod: Small clock delays to mitigate remote power analysis attacks
This paper presents UCloD, a novel random clock delay-based robust and scalable
countermeasure against recently discovered remote power analysis (RPA) attacks. UCloD …
countermeasure against recently discovered remote power analysis (RPA) attacks. UCloD …
Improving power analysis attack resistance using intrinsic noise in 3D ICs
Abstract Three-dimensional (3D) integration is envisioned as a natural defense to thwart
side-channel analysis (SCA) attacks on the hardware implementation of cryptographic …
side-channel analysis (SCA) attacks on the hardware implementation of cryptographic …
Machine-Learning-based Side-Channel Attack Detection for FPGA SoCs
Embedded systems are threatened by side-channel attacks that allow the extraction of
private keys from tampered systems. This particularly applies to FPGA-based SoCs that are …
private keys from tampered systems. This particularly applies to FPGA-based SoCs that are …
Quadseal: Quadruple balancing to mitigate power analysis attacks with variability effects and electromagnetic fault injection attacks
Side channel analysis attacks employ the emanated side channel information to deduce the
secret keys from cryptographic implementations by analyzing the power traces during …
secret keys from cryptographic implementations by analyzing the power traces during …
[HTML][HTML] Balancing the leakage currents in nanometer CMOS logic—A challenging goal
The imbalance of the currents leaked by CMOS standard cells when different logic values
are applied to their inputs can be exploited as a side channel to recover the secrets of …
are applied to their inputs can be exploited as a side channel to recover the secrets of …
NORA: Algorithmic balancing without pre-charge to thwart power analysis attacks
Power analysis attacks use power dissipation to find the secret key of cryptographic devices.
Two of the main techniques used as the countermeasures of power analysis attacks are …
Two of the main techniques used as the countermeasures of power analysis attacks are …
BSPL: Balanced Static Power Logic
The down-scaling of circuit technology has led to stronger leakage currents in CMOS
standard cells. This source of power consumption is data dependent and can be utilized to …
standard cells. This source of power consumption is data dependent and can be utilized to …
Power analysis attack resilient block cipher implementation based on 1‐of‐4 data encoding
SR Shanmugham, S Paramasivam - ETRI Journal, 2021 - Wiley Online Library
Side‐channel attacks pose an inevitable challenge to the implementation of cryptographic
algorithms, and it is important to mitigate them. This work identifies a novel data encoding …
algorithms, and it is important to mitigate them. This work identifies a novel data encoding …