An overview on loop tiling techniques for code generation

E Hammami, Y Slama - 2017 IEEE/ACS 14th International …, 2017 - ieeexplore.ieee.org
Loop tiling is a well-known compiler transformation for both sequential and parallel
programs optimization. It focuses on the efficient execution of loop nests in order to generate …

TOAST: Automatic tiling for iterative stencil computations on GPUs

RCO Rocha, AD Pereira, L Ramos… - Concurrency and …, 2017 - Wiley Online Library
The stencil pattern is important in many scientific and engineering domains, spurring great
interest from researchers and industry. In recent years, various optimizations have been …

Mpr+ sp: Towards a unified mpr-based manet extension for ospf

JA Cordero, T Clausen… - 2011 44th Hawaii …, 2011 - ieeexplore.ieee.org
Heterogeneous networks combining both wired and wireless components-fixed routers as
well as mobile routers-emerge as wireless mesh networks are being deployed. Such …

[PDF][PDF] Bachelors Thesis

M Freitag - 2014 - infosun.fim.uni-passau.de
Stencil codes form the performance-critical core of a number of applications in scientific
computing. The parallelization and optimization of stencil codes are subject of ongoing …