[CARTE][B] Interconnection networks

J Duato, S Yalamanchili, L Ni - 2002 - books.google.com
The performance of most digital systems today is limited by their communication or
interconnection, not by their logic or memory. As designers strive to make more efficient use …

[CARTE][B] Encyclopedia of parallel computing

D Padua - 2011 - books.google.com
Containing over 300 entries in an AZ format, the Encyclopedia of Parallel Computing
provides easy, intuitive access to relevant information for professionals and researchers …

Habanero-Java: the new adventures of old X10

V Cavé, J Zhao, J Shirako, V Sarkar - Proceedings of the 9th …, 2011 - dl.acm.org
In this paper, we present the Habanero-Java (HJ) language developed at Rice University as
an extension to the original Java-based definition of the X10 language. HJ includes a …

[PDF][PDF] The network architecture of the Connection Machine CM-5

CE Leiserson, ZS Abuhamdeh, DC Douglas… - Proceedings of the …, 1992 - dl.acm.org
Abstract The Connection Machine Model CM-5 Supercomputer is a massively parallel
computer system designed to offer performance in the range of 1 teraflops (1012 floating …

SafetyNet: Improving the availability of shared memory multiprocessors with global checkpoint/recovery

DJ Sorin, MMK Martin, MD Hill, DA Wood - ACM SIGARCH Computer …, 2002 - dl.acm.org
We develop an availability solution, called SafetyNet, that uses a unified, lightweight
checkpoint/recovery mechanism to support multiple long-latency fault detection schemes. At …

Performance of memory reclamation for lockless synchronization

TE Hart, PE McKenney, AD Brown, J Walpole - Journal of Parallel and …, 2007 - Elsevier
Achieving high performance for concurrent applications on modern multiprocessors remains
challenging. Many programmers avoid locking to improve performance, while others replace …

Speculative synchronization: Applying thread-level speculation to explicitly parallel applications

JF Martinez, J Torrellas - ACM SIGOPS Operating Systems Review, 2002 - dl.acm.org
Barriers, locks, and flags are synchronizing operations widely used programmers and
parallelizing compilers to produce race-free parallel programs. Often times, these operations …

[CARTE][B] Shared-memory synchronization

ML Scott, T Brown - 2013 - Springer
This monograph grows out of nearly 40 years of experience in synchronization and
concurrent data structures. Though written primarily from the perspective of systems …

Phasers: a unified deadlock-free construct for collective and point-to-point synchronization

J Shirako, DM Peixotto, V Sarkar… - Proceedings of the 22nd …, 2008 - dl.acm.org
Coordination and synchronization of parallel tasks is a major source of complexity in parallel
programming. These constructs take many forms in practice including mutual exclusion in …

[CARTE][B] Designing memory consistency models for shared memory multiprocessors

SV Adve - 1993 - search.proquest.com
The memory consistency model (or memory model) of a shared-memory multiprocessor
system influences the performance and the programmability of the system. The most intuitive …