High performance multi-standard architecture for DCT computation in H. 264/AVC high profile and HEVC codecs
A new high performance architecture for the computation of all the DCT operations adopted
in the H. 264/AVC and HEVC standards is proposed in this paper. Contrasting to other …
in the H. 264/AVC and HEVC standards is proposed in this paper. Contrasting to other …
Unified transform architecture for AVC, AVS, VC-1 and HEVC high-performance codecs
A unified architecture for fast and efficient computation of the set of two-dimensional (2-D)
transforms adopted by the most recent state-of-the-art digital video standards is presented in …
transforms adopted by the most recent state-of-the-art digital video standards is presented in …
High-throughput and low-cost hardware-oriented integer transforms for HEVC
To achieve a target bit-rate reduction of 50% over H. 264/AVC while maintaining equivalent
perceptual video quality, High Efficiency Video Coding (HEVC) includes several new coding …
perceptual video quality, High Efficiency Video Coding (HEVC) includes several new coding …
Scalable unified transform architecture for advanced video coding embedded systems
A novel high throughput and scalable unified architecture for the computation of the
transform operations in video codecs for advanced standards is presented in this paper. This …
transform operations in video codecs for advanced standards is presented in this paper. This …
A flexible architecture for the computation of direct and inverse transforms in H. 264/AVC video codecs
A new high throughput and scalable architecture for unified transform coding in H. 264/AVC
is proposed in this paper. Such flexible structure is capable of computing all the 4× 4 and 2× …
is proposed in this paper. Such flexible structure is capable of computing all the 4× 4 and 2× …
High throughput and scalable architecture for unified transform coding in embedded H. 264/AVC video coding systems
An innovative high throughput and scalable multi-transform architecture for H. 264/AVC is
presented in this paper. This structure can be used as a hardware accelerator in modern …
presented in this paper. This structure can be used as a hardware accelerator in modern …
Exploiting coarse-grained parallelism in multi-transform architectures for H. 264/AVC high profile codecs
Abstract A parallel Multi-Transform Architecture (MTA) for the computation of the 2-D
transforms adopted in modern digital video stan-dards is proposed in this paper. This …
transforms adopted in modern digital video stan-dards is proposed in this paper. This …
Efficient fast transform processor with cost-effective hardware sharing architecture for multi-standard video encoding
CW Chang, SJ Hsu, CP Fan - 2012 5th International Congress …, 2012 - ieeexplore.ieee.org
In this paper, fast multiple forward transform algorithms and their hardware sharing designs
for 2x2, 4x4, and 8x8 forward transforms in H. 264/AVC, and the 8x8 forward transform in …
for 2x2, 4x4, and 8x8 forward transforms in H. 264/AVC, and the 8x8 forward transform in …
[PDF][PDF] Dynamically reconfigurable hardware for embedded control systems
CV Paiz Gatica - 2012 - core.ac.uk
This thesis explores the use of dynamically reconfigurable hardware for the realisation of
embedded control systems, using the most well-known example of this kind of technology …
embedded control systems, using the most well-known example of this kind of technology …
Fast Algorithm Designs of Multiple-Mode Discrete Integer Transforms with Cost-Effective and Hardware-Sharing Architectures for Multistandard Video Coding …
CP Fan - Recent Advances in Image and Video Coding, 2016 - books.google.com
In this chapter, first we give a brief view of transform-based video coding. Second, the basic
matrix decomposition scheme for fast algorithm and hardware-sharing-based integer …
matrix decomposition scheme for fast algorithm and hardware-sharing-based integer …