BACKGROUND 0003. By generating a tensile stress (or strain) or a com pressive stress in a
channel region of a transistor, the mobility of carriers in the channel region can be improved …

(57) ABSTRACT A method includes forming at least one fin in a semicon ductor substrate. A
fin spacer is formed on at least a first portion of the at least one fin. The fin spacer has an …

Fin height control techniques for FINFET fabrication are disclosed. The technique includes a
method for controlling the height of plurality of fin structures to achieve uniform height thereof …

Embodiments of the present invention provide an improved structure and method for forming
CMOS field effect transis tors. In embodiments, silicon germanium (SiGe) is formed on a …

US9564367B2 - Methods of forming different FinFET devices with different threshold
voltages and integrated circuit products containing such devices - Google Patents …

(57) ABSTRACT A method of forming a semiconductor device, includes forming a first work
function metal and sacrificial layer on an n-type field effect transistor (nFET) and on ap-type …

(57) ABSTRACT A method and device are provided for etching and replacing silicon fins in
connection with a FinFET integration process. Embodiments include providing a first plurality …

(57) ABSTRACT A method of forming complementary vertical fins and vertical fins with
uniform heights, including, forming a trench in a region of a substrate, wherein the trench …

The described technology relates to methods and structures for precisely controlling the
height of a fin struc ture. In some cases, the technology may be used to form field-effect …

US9502415B2 - Method for providing an NMOS device and a PMOS device on a silicon substrate
and silicon substrate comprising an NMOS device and a PMOS device - Google Patents …