Field programmable gate array applications—A scientometric review
Field Programmable Gate Array (FPGA) is a general purpose programmable logic device
that can be configured by a customer after manufacturing to perform from a simple logic gate …
that can be configured by a customer after manufacturing to perform from a simple logic gate …
High-speed hardware architectures and FPGA benchmarking of CRYSTALS-Kyber, NTRU, and Saber
Post-Quantum Cryptography (PQC) has emerged as a response of the cryptographic
community to the danger of attacks performed using quantum computers. All PQC schemes …
community to the danger of attacks performed using quantum computers. All PQC schemes …
Implementation and benchmarking of round 2 candidates in the NIST post-quantum cryptography standardization process using hardware and software/hardware co …
Performance in hardware has typically played a major role in differentiating among leading
candidates in cryptographic standardization efforts. Winners of two past NIST cryptographic …
candidates in cryptographic standardization efforts. Winners of two past NIST cryptographic …
Implementing and benchmarking three lattice-based post-quantum cryptography algorithms using software/hardware codesign
It has been predicted that within the next tenfifteen years, quantum computers will have
computational power sufficient to break current public-key cryptography schemes. When that …
computational power sufficient to break current public-key cryptography schemes. When that …
Efficient and concurrent reliable realization of the secure cryptographic SHA-3 algorithm
The secure hash algorithm (SHA)-3 has been selected in 2012 and will be used to provide
security to any application which requires hashing, pseudo-random number generation, and …
security to any application which requires hashing, pseudo-random number generation, and …
Hardware acceleration design of the SHA-3 for high throughput and low area on FPGA
In sensitive communications, the cryptographic hash function plays a crucial role, including
in the military, healthcare, and banking, ensuring secure transmission by verifying data …
in the military, healthcare, and banking, ensuring secure transmission by verifying data …
Comprehensive evaluation of high-speed and medium-speed implementations of five SHA-3 finalists using **linx and Altera FPGAs
In this paper we present a comprehensive comparison of all Round 3 SHA-3 candidates and
the current standard SHA-2 from the point of view of hardware performance in modern …
the current standard SHA-2 from the point of view of hardware performance in modern …
On efficiency enhancement of SHA-3 for FPGA-based multimodal biometric authentication
Synchronized padder block and a compact-dynamic round constant (RC) generator to
achieve highly efficient Keccak architecture are proposed in this work. The proposed design …
achieve highly efficient Keccak architecture are proposed in this work. The proposed design …
[PDF][PDF] Hardware api for lightweight cryptography
In this paper, we define the Lightweight Cryptography (LWC) Hardware Application
Programming Interface (API) for the implementations of lightweight authenticated ciphers …
Programming Interface (API) for the implementations of lightweight authenticated ciphers …
[PDF][PDF] High-speed hardware architectures and fair FPGA benchmarking of CRYSTALS-kyber NTRU and saber
Performance in hardware has typically played a significant role in differentiating among
leading candidates in cryptographic standardization efforts. Winners of two past NIST …
leading candidates in cryptographic standardization efforts. Winners of two past NIST …