Application map** is one of the most important dimensions in Network-on-Chip (NoC)
research. It maps the cores of the application to the routers of the NoC topology, affecting the …

Abstract Network-on-chips (NoCs) have been widely employed in the design of
multiprocessor system-on-chips (MPSoCs) as a scalable communication solution. NoCs …

This paper presents a discrete particle swarm optimization (PSO)-based strategy to map
applications on both 2-D and 3-D mesh-connected Networks-on-Chip. The basic PSO …

Addresses the Challenges Associated with System-on-Chip Integration Network-on-Chip:
The Next Generation of System-on-Chip Integration examines the current issues restricting …

Network-on-chip (NoC) is evolving as a better substitute for incorporating a large number of
cores on a single system-on-chip (SoC). The dependency on multi-core systems to …

Ever shrinking technologies in VLSI era made it possible to place several IP (Intellectual
Property) blocks onto a single die. This technology improvement also brought the challenge …

Ever shrinking technologies in VLSI era made it possible to place several modules onto a
single die. However, the need for the new communication methods has also increased …

The 2D mesh topology-based Network-on-Chip (NoC) is a prevalent structure in System-on-
Chip (SoC) designs, offering implementation and fabrication benefits. However, increased …

Network-on-Chip (NoC) is a newly introduced paradigm to overcome the communication
problems of System-on-Chip architectures. Map** applications onto mesh-based NoC …

Due to shrinking technology sizes, more and more processing elements and memory blocks
are being integrated on a single die. However, traditional communication infrastructures (eg …