Advancement and challenges in MOSFET scaling

RK Ratnesh, A Goel, G Kaushik, H Garg… - Materials Science in …, 2021 - Elsevier
In this study, we enlighten about the field effect transistors (FET) and their technologies. As
far as very large integration is concerned, researchers are continuously focusing on scaling …

Identification of oxide defects in semiconductor devices: A systematic approach linking DFT to rate equations and experimental evidence

W Goes, Y Wimmer, AM El-Sayed, G Rzepa… - Microelectronics …, 2018 - Elsevier
It is well-established that oxide defects adversely affect functionality and reliability of a wide
range of microelectronic devices. In semiconductor-insulator systems, insulator defects can …

Energetic map** of oxide traps in MoS2 field-effect transistors

YY Illarionov, T Knobloch, M Waltl, G Rzepa… - 2D …, 2017 - iopscience.iop.org
The performance of MoS 2 transistors is strongly affected by charge trap** in oxide traps
with very broad distributions of time constants. These defects degrade the mobility and …

A brief overview of gate oxide defect properties and their relation to MOSFET instabilities and device and circuit time-dependent variability

B Kaczer, J Franco, P Weckx, PJ Roussel… - Microelectronics …, 2018 - Elsevier
A paradigm for MOSFET instabilities is outlined based on gate oxide traps and the detailed
understanding of their properties. A model with trap energy levels in the gate dielectric and …

Reliability in super-and near-threshold computing: A unified model of RTN, BTI, and PV

VM Van Santen, J Martin-Martinez… - … on Circuits and …, 2017 - ieeexplore.ieee.org
Near-threshold computing (NTC) poses stringent constraints on designing reliable circuits,
as degradations have a magnified impact at lower supply voltages (Vdd) compared with …

Single-versus multi-step trap assisted tunneling currents—Part I: Theory

C Schleich, D Waldhör, T Knobloch… - … on Electron Devices, 2022 - ieeexplore.ieee.org
Leakage currents through dielectrics in modern logic, memory, and power devices, and back-
end interlevel layers can severely increase the time-zero power dissipation and shorten the …

Extraction of charge trap** kinetics of defects from single-defect measurements

M Waltl, B Stampfer, T Grasser - IEEE Transactions on Device …, 2024 - ieeexplore.ieee.org
Charge trap** at oxide defects poses a serious reliability concern in MOS transistors. For
scaled technology nodes, the impact of charge-trap** events on the device behavior …

Reliability challenges with self-heating and aging in finfet technology

H Amrouch, VM van Santen, O Prakash… - 2019 IEEE 25th …, 2019 - ieeexplore.ieee.org
The introduction of FinFET technology as an effective solution to continue technology
scaling has pushed self-heating effects to the forefront of reliability challenges, especially at …

The defect-centric perspective of device and circuit reliability—From gate oxide defects to circuits

B Kaczer, J Franco, P Weckx, PJ Roussel, M Simicic… - Solid-State …, 2016 - Elsevier
Abstract As-fabricated (time-zero) variability and mean device aging are nowadays routinely
considered in circuit simulations and design. Time-dependent variability (reliability-related …

Semi-automated extraction of the distribution of single defects for nMOS transistors

B Stampfer, F Schanovsky, T Grasser, M Waltl - Micromachines, 2020 - mdpi.com
Miniaturization of metal-oxide-semiconductor field effect transistors (MOSFETs) is typically
beneficial for their operating characteristics, such as switching speed and power …