Macroscalar processor architecture

JE Gonion - US Patent 8,065,502, 2011 - Google Patents
5,734,880 A 3/1998 Guttaget al. 5,734,908 A 3, 1998 Chan et al. 5,790,866 A 8, 1998
Robison capable of executing an instruction of an iteration of the program loop Substantially …

Method and apparatus for adaptive power consumption

JB White, JL Van Welzen - US Patent 7,634,668, 2009 - Google Patents
US7634668B2 - Method and apparatus for adaptive power consumption - Google Patents
US7634668B2 - Method and apparatus for adaptive power consumption - Google Patents …

Controlling operation of a voltage supply according to the activity of a multi-core integrated circuit component or of multiple IC components

E Rotem - US Patent App. 10/442,595, 2005 - Google Patents
(57) ABSTRACT A voltage Supply is to power an integrated circuit (IC) component of a
computer System. The component has a number of logic cores or functional blocks that are …

Performance and power optimization via block oriented performance measurement and control

M Altmejd, E Menezes, D Tobias - US Patent 6,895,520, 2005 - Google Patents
An integrated circuit includes a plurality of functional blocks. Utilization information for the
various functional blockS is generated. Based on that information, the power consumption …

Digital throttle for multiple operating points

JS Burns, S Rusu, DJ Ayers, ET Grochowski… - US Patent …, 2007 - Google Patents
2. Background Art Modern processors include extensive execution resources to Support
concurrent processing of multiple instructions. A processor typically includes one or more …

Low power reconfigurable systems and methods

RW Sherburne Jr - US Patent 6,990,598, 2006 - Google Patents
CLK IN controls the performance of the unit; one or more clock controllers having clock
outputs coupled to the clock inputs of the processing units, the controller operating varying …

Macroscalar processor architecture

JE Gonion - US Patent 7,975,134, 2011 - Google Patents
(57) ABSTRACT A macroscalar processor architecture is described herein. In one
embodiment, an exemplary processor includes one or more execution units to execute …

Macroscalar processor architecture

JE Gonion - US Patent 8,412,914, 2013 - Google Patents
US8412914B2 - Macroscalar processor architecture - Google Patents US8412914B2 -
Macroscalar processor architecture - Google Patents Macroscalar processor architecture …

Methods of clock throttling in an integrated circuit

M Adachi - US Patent 7,536,575, 2009 - Google Patents
5,451,892 A 9/1995 Bailey occur with a rapid shut OFF and a rapid turn ON of a clock. 5.490,
059 A 2/1996 Mahalingaiah et al. Included are methods and apparatus for digital thermal …

Processing Unit Incorporating Issue Rate-Based Predictive Thermal Management

SJ Schwinn, MR Tubbs, CD Wait - US Patent App. 12/015,174, 2009 - Google Patents
(57) ABSTRACT A circuit arrangement and method utilize an issue rate-based predictive
thermal management technique in a microproces sor or other integrated circuit that tracks …