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Near-threshold RISC-V core with DSP extensions for scalable IoT endpoint devices
Endpoint devices for Internet-of-Things not only need to work under extremely tight power
envelope of a few milliwatts, but also need to be flexible in their computing capabilities, from …
envelope of a few milliwatts, but also need to be flexible in their computing capabilities, from …
Fully depleted SOI (FDSOI) technology
K Cheng, A Khakifirooz - Science China Information Sciences, 2016 - Springer
Fully depleted SOI (FDSOI) has become a viable technology not only for continued CMOS
scaling to 22 nm node and beyond but also for improving the performances of legacy …
scaling to 22 nm node and beyond but also for improving the performances of legacy …
Variation-tolerant, ultra-low-voltage microprocessor with a low-overhead, within-a-cycle in-situ timing-error detection and correction technique
This paper presents a design approach for upgrading the resiliency of ultra-low-voltage
(ULV) microprocessors through a voltage-scalable and low-overhead in-situ error detection …
(ULV) microprocessors through a voltage-scalable and low-overhead in-situ error detection …
Mr. wolf: A 1 gflop/s energy-proportional parallel ultra low power soc for iot edge processing
We present Mr. Wolf, a Parallel Ultra Low Power (PULP) SoC featuring a hierarchical
architecture with a small (12KG) microcontroller class RISC-V core augmented with an …
architecture with a small (12KG) microcontroller class RISC-V core augmented with an …
Energy-efficient near-threshold parallel computing: The PULPv2 cluster
This article presents an ultra-low-power parallel computing platform and its system-on-chip
(SoC) embodiment, targeting a wide range of emerging near-sensor processing tasks for …
(SoC) embodiment, targeting a wide range of emerging near-sensor processing tasks for …
A 60 gops/w,− 1.8 v to 0.9 v body bias ulp cluster in 28 nm utbb fd-soi technology
Ultra-low power operation and extreme energy efficiency are strong requirements for a
number of high-growth application areas, such as E-health, Internet of Things, and wearable …
number of high-growth application areas, such as E-health, Internet of Things, and wearable …
A survey on low-power techniques with emerging technologies: From devices to systems
Nowadays, power consumption is one of the main limitations of electronic systems. In this
context, novel and emerging devices provide new opportunities to extend the trend toward …
context, novel and emerging devices provide new opportunities to extend the trend toward …
8.4 a 0.33 v/-40 c process/temperature closed-loop compensation soc embedding all-digital clock multiplier and dc-dc converter exploiting fdsoi 28nm back-gate …
A 32b SoC is designed in 28nm FDSOI to operate in either an energy-efficiency (EE) mode,
at 0.45 V, or low-leakage (LL) mode, at 0.33 V, with process-temperature compensation. At …
at 0.45 V, or low-leakage (LL) mode, at 0.33 V, with process-temperature compensation. At …
193 MOPS/mW@ 162 MOPS, 0.32 V to 1.15 V voltage range multi-core accelerator for energy efficient parallel and sequential digital processing
Low power (mW) and high performance (GOPS) are strong requirements for compute-
intensive signal processing in E-health, Internet-of-Things, and wearable applications. This …
intensive signal processing in E-health, Internet-of-Things, and wearable applications. This …
DSC-TRCP: Dynamically self-calibrating tunable replica critical paths based timing monitoring for variation resilient circuits
In situ timing monitoring of critical paths (CPs) can help eliminate the excess timing margin
but suffer from miss detection risk because the CPs might not be activated. However, indirect …
but suffer from miss detection risk because the CPs might not be activated. However, indirect …