Multiprocessor system-on-chip (MPSoC) technology

W Wolf, AA Jerraya, G Martin - IEEE transactions on computer …, 2008 - ieeexplore.ieee.org
The multiprocessor system-on-chip (MPSoC) uses multiple CPUs along with other hardware
subsystems to implement a system. A wide range of MPSoC architectures have been …

Hardware/software codesign: The past, the present, and predicting the future

J Teich - Proceedings of the IEEE, 2012 - ieeexplore.ieee.org
Hardware/software codesign investigates the concurrent design of hardware and software
components of complex electronic systems. It tries to exploit the synergy of hardware and …

Modern development methods and tools for embedded reconfigurable systems: A survey

L Jóźwiak, N Nedjah, M Figueroa - Integration, 2010 - Elsevier
Heterogeneous reconfigurable systems provide drastically higher performance and lower
power consumption than traditional CPU-centric systems. Moreover, they do it at much lower …

[BOOK][B] ESL design and verification: a prescription for electronic system level methodology

G Martin, B Bailey, A Piziali - 2010 - books.google.com
Visit the authors' companion site! http://www. electronicsystemlevel. com/-Includes
interactive forum with the authors! Electronic System Level (ESL) design has mainstreamed …

Application-specific processing on a general-purpose core via transparent instruction set customization

N Clark, M Kudlur, H Park, S Mahlke… - … (MICRO-37'04), 2004 - ieeexplore.ieee.org
Application-specific instruction set extensions are an effective way of improving the
performance of processors. Critical computation subgraphs can be accelerated by …

Application-specific instruction generation for configurable processor architectures

J Cong, Y Fan, G Han, Z Zhang - Proceedings of the 2004 ACM/SIGDA …, 2004 - dl.acm.org
Designing an application-specific embedded system in nanometer technologies has
become more difficult than ever due to the rapid increase in design complexity and …

Exact and approximate algorithms for the extension of embedded processor instruction sets

L Pozzi, K Atasu, P Ienne - IEEE Transactions on Computer …, 2006 - ieeexplore.ieee.org
In embedded computing, cost, power, and performance constraints call for the design of
specialized processors, rather than for the use of the existing off-the-shelf solutions. While …

Processor acceleration through automated instruction set customization

N Clark, H Zhong, S Mahlke - Proceedings. 36th Annual IEEE …, 2003 - ieeexplore.ieee.org
Application-specific extensions to the computational capabilities of a processor provide an
efficient mechanism to meet the growing performance and power demands of embedded …

Scalable custom instructions identification for instruction-set extensible processors

P Yu, T Mitra - Proceedings of the 2004 international conference on …, 2004 - dl.acm.org
Extensible processors allow addition of application-specific custom instructions to the core
instruction set architecture. However, it is computationally expensive to automatically select …

[PDF][PDF] An extended data-flow architecture for data analysis and visualization

G Abram, L Treinish - ACM SIGGRAPH Computer Graphics, 1995 - dl.acm.org
In iterative applications, there are often major parts of the network that are unaffected when
input parameters are modified. In fig-ure 2, if the iso-value input to Isosurface is changed …