Simulation study of hetero dielectric tri material gate tunnel FET based common source amplifier circuit

U Dutta, MK Soni, M Pattanaik - AEU-International Journal of Electronics …, 2019 - Elsevier
Abstract Tunneling Field Effect Transistor (TFET) has emerged as an alternative device to
MOSFET for designing low power analog and digital integrated circuits. This paper …

Design, simulation and comparative analysis of a novel FinFET based astable multivibrator

A Gupta, R Mathur, M Nizamuddin - AEU-International Journal of …, 2019 - Elsevier
In this work, design and simulation of FinFET and CMOS based Astable Multivibrator (AMV)
have been performed. Performance of proposed circuit was compared by varying resistance …

A new leakage-tolerant high speed comparator based domino gate for wide fan-in OR logic for low power VLSI circuits

A Kumar, RK Nagaria - Integration, 2018 - Elsevier
A new leakage tolerant high speed domino gate having higher noise immunity, low power
dissipation, and less process variations for wide fan-in OR logic is developed. This paper …

The Effect of Noise Robustness on Domino Using Silicon Nano Materials

S Garg, TK Gupta, AK Pandey, D Pandey, P Rajpoot - Silicon, 2024 - Springer
This article describes a novel Low Voltage Noise Immune Domino Logic (LVNIDL), which
can be used to create CMOS domino using Si Nanomaterials. In 32 nm nano size silicon …

High speed wide fan‐in designs using clock controlled dual keeper domino logic circuits

A Anita Angeline, VS Kanchana Bhaaskaran - ETRI Journal, 2019 - Wiley Online Library
Clock Controlled Dual keeper Domino logic structures (CCDD _1 and CCDD _2) for
achieving a high‐speed performance with low power consumption and a good noise margin …

Design impacts of delay invariant high‐speed clock delayed dual keeper domino circuit

AA Angeline… - IET Circuits, Devices & …, 2019 - Wiley Online Library
Precise keeper control of domino logic circuit can significantly increase the speed of
operation. However, the positive feedback gain associated with the feedback keeper circuit …

Speed enhancement techniques for clock-delayed dual keeper domino logic style

AA Angeline, VSK Bhaaskaran - International Journal of …, 2020 - Taylor & Francis
Domino circuit topology for high-speed operation, robustness and lower power consumption
is quintessential in design of digital systems. In this paper, various high speed and robust …

A novel method to control leakage and noise in domino circuit for wide fan-in OR logic

A Kumar, RK Nagaria - Journal of Circuits, Systems and Computers, 2022 - World Scientific
This paper proposes a novel method to control leakage and noise in domino circuits for wide
fan-in OR logic with low power consumption, low process variation, and higher noise margin …

Impact of silicon stacked transistors on nano scale domino logic

S Garg, TK Gupta, AK Pandey, D Pandey - Silicon, 2022 - Springer
In this article, a novel High Speed Stacked Transistor Logic (HSSTDL) for implementing
silicon-based domino circuits in CMOS technology is presented. For wide fan-in input …

Introduction of a new technique for simultaneous reduction of the delay and leakage current in digital circuits

H Mohammadian, MB Tavakolib, F Setoudeh, A Horri - Integration, 2021 - Elsevier
By the reduction in the size of transistors and the development of submicron technology, as
well as the construction of more integrated circuits on chips, leakage power has become one …