Multicast snoo**: A new coherence method using a multicast address network

EE Bilir, RM Dickson, Y Hu, M Plakal, DJ Sorin… - ACM SIGARCH …, 1999 - dl.acm.org
This paper proposes a new coherence method called" multicast snoo**" that dynamically
adapts between broadcast snoo** and a directory protocol. Multicast snoo** is unique …

Specifying and verifying a broadcast and a multicast snoo** cache coherence protocol

DJ Sorin, M Plakal, AE Condon, MD Hill… - … on Parallel and …, 2002 - ieeexplore.ieee.org
We develop a specification methodology that documents and specifies a cache coherence
protocol in eight tables: the states, events, actions, and transitions of the cache and memory …

Lamport clocks: verifying a directory cache-coherence protocol

M Plakal, DJ Sorin, AE Condon, MD Hill - Proceedings of the tenth …, 1998 - dl.acm.org
Modern shared-memory multiprocessors use complex memory system implementations that
include a variety of non-trivial and interacting optimizations. More time is spent in verl $ ving …

A complexity-effective out-of-order retirement microarchitecture

SP Marti, JS Borras, PL Rodriguez… - IEEE Transactions …, 2009 - ieeexplore.ieee.org
Current superscalar processors commit instructions in program order by using a reorder
buffer (ROB). The ROB provides support for speculation, precise exceptions, and register …

Efficient algorithms for verifying memory consistency

C Manovit, S Hangal - Proceedings of the seventeenth annual ACM …, 2005 - dl.acm.org
One approach in verifying the correctness of a multiprocessor system is to show that its
execution results comply with the memory consistency model it is meant to implement. It has …

Using lamport clocks to reason about relaxed memory models

AE Condon, MD Hill, M Plakal… - … Symposium on High …, 1999 - ieeexplore.ieee.org
Cache coherence protocols of current shared-memory multiprocessors are difficult to verify.
Our previous work proposed an extension of Lamport's logical clocks for showing that …

[PDF][PDF] Constraint Graph Analysis of Multithreaded Programs.

HW Cain, MH Lipasti, R Nair - IEEE PACT, 2003 - pages.cs.wisc.edu
This paper presents a framework for analyzing the performance of multithreaded programs
using a model called a constraint graph. We review previous constraint graph definitions for …

[PDF][PDF] Multiprocessor memory model verification

PN Loewenstein, S Chaudhry, R Cypher… - Proc. AFM (Automated …, 2006 - fm.csl.sri.com
Multiprocessor Memory Model Verification Page 1 Multiprocessor Memory Model
Verification Paul Loewenstein, Shailender Chaudhry, Robert Cypher, Chaiyasit Manovit 21 …

Using timestam** and history variables to verify sequential consistency

T Arons - … Aided Verification: 13th International Conference, CAV …, 2001 - Springer
In this paper we propose a methodology for verifying the sequential consistency of caching
algorithms. The scheme combines times-tam** and an auxiliary history table to construct a …

A system-level Specification Framework for I/O Architectures

MD Hill, AE Condon, M Plakal, DJ Sorin - Proceedings of the eleventh …, 1999 - dl.acm.org
A computer system is useless unless it can interact with the outside world through
input/output (I/O) devices. II0 systems are complex, including aspects such as memory …