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A 128-channel 6 mW wireless neural recording IC with spike feature extraction and UWB transmitter
This paper reports a 128-channel neural recording integrated circuit (IC) with on-the-fly
spike feature extraction and wireless telemetry. The chip consists of eight 16-channel front …
spike feature extraction and wireless telemetry. The chip consists of eight 16-channel front …
Analysis of power consumption and linearity in capacitive digital-to-analog converters used in successive approximation ADCs
Successive-approximation analog-to-digital converters (SA-ADCs) are widely used in ultra-
low-power applications. In this paper, the power consumption and the linearity of capacitive …
low-power applications. In this paper, the power consumption and the linearity of capacitive …
The 128-channel fully differential digital integrated neural recording and stimulation interface
F Shahrokhi, K Abdelhalim, D Serletis… - … Circuits and Systems, 2010 - ieeexplore.ieee.org
We present a fully differential 128-channel integrated neural interface. It consists of an array
of 8 X 16 low-power low-noise signal-recording and generation circuits for electrical neural …
of 8 X 16 low-power low-noise signal-recording and generation circuits for electrical neural …
PCMO RRAM for integrate-and-fire neuron in spiking neural networks
Resistance random access memories (RRAM) or memristors with an analog change of
conductance are widely explored as an artificial synapse, eg, Pr 0.7 Ca 0.3 MnO 3 (PCMO) …
conductance are widely explored as an artificial synapse, eg, Pr 0.7 Ca 0.3 MnO 3 (PCMO) …
A 9.4-ENOB 1V 3.8 μW 100kS/s SAR ADC with time-domain comparator
The ADC-SAR is fabricated in a 0.18 μm 2P5M CMOS process. This SAR-ADC converter
achieves 56fJ/conversion-step FOM with 58dB SNDR. It uses a comparator, named time …
achieves 56fJ/conversion-step FOM with 58dB SNDR. It uses a comparator, named time …
Low-power 2.4-GHz transceiver with passive RX front-end and 400-mV supply
BW Cook, A Berny, A Molnar… - IEEE Journal of Solid …, 2006 - ieeexplore.ieee.org
An ultra low power 2.4-GHz transceiver targeting wireless sensor network applications is
presented. The receiver front-end is fully passive, utilizing an integrated resonant matching …
presented. The receiver front-end is fully passive, utilizing an integrated resonant matching …
A 65-fJ/conversion-step 0.9-V 200-kS/s rail-to-rail 8-bit successive approximation ADC
HC Hong, GM Lee - IEEE Journal of Solid-State Circuits, 2007 - ieeexplore.ieee.org
An 8-bit successive approximation (SA) analog-to-digital converter (ADC) in 0.18 mum
CMOS dedicated for energy-limited applications is presented. The SA ADC achieves a wide …
CMOS dedicated for energy-limited applications is presented. The SA ADC achieves a wide …
A low-power 32-channel digitally programmable neural recording integrated circuit
We report the design of an ultra-low-power 32-channel neural-recording integrated circuit
(chip) in a 0.18 μ m CMOS technology. The chip consists of eight neural recording modules …
(chip) in a 0.18 μ m CMOS technology. The chip consists of eight neural recording modules …
A battery-powered activity-dependent intracortical microstimulation IC for brain-machine-brain interface
M Azin, DJ Guggenmos, S Barbay… - IEEE Journal of Solid …, 2011 - ieeexplore.ieee.org
This paper describes an activity-dependent intracortical microstimulation (ICMS) system-on-
chip (SoC) that converts extracellular neural spikes recorded from one brain region to …
chip (SoC) that converts extracellular neural spikes recorded from one brain region to …
A 8-bit 500-KS/s low power SAR ADC for bio-medical applications
YK Chang, CS Wang, CK Wang - 2007 IEEE Asian Solid-State …, 2007 - ieeexplore.ieee.org
This paper presents a successive approximation register analog-to-digital converter (SAR
ADC) design for bio-medical applications. An energy-saving switching sequence technique …
ADC) design for bio-medical applications. An energy-saving switching sequence technique …