This paper contains a tutorial on bus-encoding techniques that target low power dissipation.
Three general classes of codes, ie, algebraic, permutation-based, and probability-based …

Over the past decade, system-on-chip (SoC) designs have evolved to address the ever
increasing complexity of applications, fueled by the era of digital convergence …

In modern processors, data-movement consumes two orders of magnitude higher energy
than a floating-point operation and hence, data-movement is becoming the primary …

Power and energy consumption has recently become an important issue and consequently,
power-aware techniques are being devised at all levels of system design; from the circuit …

As technology shrinks, the power dissipated by the links of a network-on-chip (NoC) starts to
compete with the power dissipated by the other elements of the communication subsystem …

This paper proposes efficient encoding techniques for decreasing power dissipation on
global buses. The best target for these techniques is a wide and highly capacitive memory …

In deep-submicron technology, minimising the propagation delay and power consumption
on buses is the most important design objective in system-on-chip design. In particular, the …

In this paper, we propose a system-level design methodology for the efficient exploration of
the architectural parameters of the memory sub-systems, from the energy-delay joint …

In on-chip buses, the RC crosstalk effect leads to serious problems, such as wire
propagation delay and dynamic power dissipation. This paper presents two efficient bus …

This paper presents Pyramid code, an optimal code for transmitting sequential addresses
over a DRAM bus. Constructed by finding an Eulerian cycle on a complete graph, this code …